By Tilak Agerwala (auth.), André Seznec, Joel Emer, Michael O’Boyle, Margaret Martonosi, Theo Ungerer (eds.)
This publication constitutes the refereed lawsuits of the Fourth overseas convention on excessive functionality Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009.
The 27 revised complete papers awarded including 2 invited keynote paper have been conscientiously reviewed and chosen from ninety seven submissions. The papers are geared up in topical sections on dynamic translation and optimisation, low point scheduling, parallelism and source keep watch over, verbal exchange, mapping for CMPs, strength, cache matters in addition to parallel embedded applications.
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Extra resources for High Performance Embedded Architectures and Compilers: Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings
In order to unobtrusively collect information on a program run, and reoptimize the program, GCC is modiﬁed so as to add to each program a routine which is executed when the program terminates. This termination routine collects several information about the program (a program identiﬁer, architecture and compiler identiﬁers, which optimizations were applied) and about the last run (performance measurements; currently, execution time and proﬁling information), and stores them into a remote database.
With the advent of easy-to-program general purpose GPUs, virtually every recent desktop computer is a heterogeneous system. Combining the CPU and the GPU brings great amounts of processing power. However, such architectures are often used in a restricted way for domain-speciﬁc applications like scientiﬁc applications and games, and they tend to be used by a single application at a time. We envision future heterogeneous computing systems where all their heterogeneous resources are continuously utilized by diﬀerent applications with versioned critical parts to be able to better adapt their behavior and improve execution time, power consumption, response time and other constraints at runtime.
We developed several scheduling policies and present the study of their impact on system performance. We demonstrate that such scheduler allows multiple applications to fully utilize all available processing resources in CPU/GPU-like systems and consistently achieve speedups ranging from 30% to 40% compared to just using the GPU in a single application mode. 1 Introduction The objectives of this work are twofold. On the one hand, fully exploiting the computing power available in current CPU/GPU-like heterogeneous systems and thus, increasing overall system performance is pursued.
High Performance Embedded Architectures and Compilers: Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings by Tilak Agerwala (auth.), André Seznec, Joel Emer, Michael O’Boyle, Margaret Martonosi, Theo Ungerer (eds.)